1. Field of the Invention
The invention pertains to a method for altering one or more electrical connections in an electronic package including one or more semiconductor chips overlying a printed circuit card or printed circuit board, and to the resulting electronic package.
2. Description of the Related Art
Many high-end computer systems currently include one or more electronic packages of the type depicted in FIG. 1. Each such package 10 typically includes one or more semiconductor chips 20 (only one of which is shown), with the chips being mounted either individually or in groups onto the upper surfaces of modules 30, e.g., single-layer modules or multi-layer modules. The chips are, for example, mounted face-down onto the modules, and mechanically and electrically connected to contact pads (not shown) on the modules using solder balls 22 (as depicted in FIG. 1). Alternatively, the chips are mounted face-up, and mechanically and electrically connected to contact pads on the modules using wire bonds (not shown).
In the case of some (but not all) multi-layer modules, each mounted chip 20 is encircled by an array of engineering change (EC) contact pads (not shown) formed on the upper surface of the corresponding multi-layer module 30. As discussed more fully below, these EC pads are currently included on some of the multi-layer modules so as to permit electrical connections to be altered. Significantly, the need for, and the presence of, the EC pads on these modules limits the density of chips 20 on the modules 30.
As shown in FIG. 1, each single-layer or multi-layer module 30 includes a plurality of electrically conductive pins 40 extending from the bottom of the module. If module 30 is a single-layer module, then the pins 40 typically also extend through the full thickness of the module, whereas if the module is a multi-layer module, then the pins may, for example, extend only partially through the thickness of the module. In the case of a single-layer module, the integrated circuits formed in and on the semiconductor chips 20 mounted on the module 30 are electrically connected to the pins 40 through printed wires (not shown) on the upper surface of the module. In the case of a multi-layer module 30, the integrated circuits formed in and on the semiconductor chips 20 mounted on the module 30 are electrically connected to the pins 40 through printed wires (not shown) on the upper surface of, and plated via holes extending partially through the thickness of, the module.
The chip-bearing modules 30 of the electronic package 10 are themselves mounted onto a multi-layer substrate 50 which is, for example, a printed circuit card or printed circuit board. The substrate 50, through which electrical power and electrical signals are communicated to the chips 20, includes at least one layer 60 of electrically conductive material, e.g., copper, which has been patterned into a plurality of strips, called signal traces or signal lines. Electrical signals are transmitted along the signal traces to the semiconductor chips 20 and hence the patterned layer 60 is termed a signal plane. The substrate 50 also includes at least one layer 70 of electrically conductive material, e.g., copper, along which electrical power is communicated to the semiconductor chips 20, and thus the layer 70 is termed a power plane. The substrate 50 further includes at least one layer 80 of electrically conductive material, e.g., copper, which serves as a ground plane. The signal, power and ground planes 60, 70 and 80 are separated by layers 90 of electrically insulating material, e.g., layers of polyimide-based material.
In order to mount the modules 30 onto the substrate 50 and provide electrical connections between the chips 20 and the signal, power and ground planes of the substrate 50, holes 100, e.g., stepped holes, are initially drilled into the substrate 50, extending through the thickness of the substrate and intersecting the signal plane 60, the power plane 70 or the ground plane 80. These holes are conventionally plated with an electrically conductive, solder-wettable material, such as copper. The desired mounting and electrical connections are achieved by inserting the pins 40 of the modules 30 into the holes, and using conventional wave soldering techniques to fill the holes with (electrically conductive) solder.
If EC pads are not provided on the modules 30, as is the case with single-layer modules and most multi-layer modules, then, as depicted in FIG. 1, EC pads 104 (only one of which is shown) are provided on the upper surface of the substrate 50, encircling each module 30. Each such EC pad 104 is typically a portion, or an extension, of a land encircling a plated via hole 108 extending from the upper surface of the substrate 50 to, for example, the signal plane 60, the power plane 70 (as depicted in FIG. 1) or the ground plane 80. Typically, each such plated via hole 108 is filled with (electrically conductive) solder using conventional wave soldering techniques. Significantly, just as the presence of EC pads on certain multi-layer modules 30 limits the density of chips on the modules, the presence of EC pads on the substrate 50 limits the density of modules on the substrate 50, and therefore limits the density of chips in the electronic package 10.
Referring now to FIG. 2, there are instances in which electrical connections between one or more chip components and either the signal plane 60, the power plane 70 or the ground plane 80 of the substrate 50 must be changed. For example, such a change may be the result of a design change (commonly referred to as an engineering change). Alternatively, the change may be the result of a fault, e.g., a short circuit, discovered during the manufacturing process (with the corresponding change being commonly referred to as rework), or of a fault found at the end of the manufacturing process (with the corresponding change being commonly referred to as repair). In any event, such a change is conventionally effected by first removing the relevant module 30 from the substrate 50. Then, one or more solder-filled holes 100 are drilled out with a mechanical drill, so as to remove the unwanted or faulty electrical connections, and each of the drilled-out holes is plugged with a solid cylinder 110 of electrically insulating material. Finally, the chip-bearing module 30 is re-mounted onto the substrate 50 and, if EC pads are provided on the substrate 50, then, as depicted in FIG. 2, wire bonds are extended from contact pads (not shown) on the module to which the chip or chips are electrically connected to EC pads 104 on the substrate 50 to effect new electrical connections. Alternatively, if EC pads are provided on the module, then wire bonds are extended from the contact pads on the module to which the chip or chips are electrically connected to EC contact pads on the module (which are electrically connected to different pins 40, and thus to different signal planes or signal traces, power planes or ground planes) to effect new electrical connections. It should be noted that while this procedure is effective, the need to remove the module 30 from the substrate 50 is inconvenient and significantly increases the cost of the electronic package 10.
Thus, those engaged in the development and manufacture of electronic packages have sought, thus far without success, methods for effecting engineering changes, rework and repair which avoid the need for EC pads and avoid the need for removing chip-bearing modules from substrates such as cards and boards.